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19-3837; Rev 0; 10/05
Precision Temperature Monitor for DDR Memory Modules
General Description
The MAX6604 high-precision temperature sensor is designed for thermal monitoring functions in DDR memory modules. The device is readable and programmable through the 2-wire SMBusTM/I2C-compatible interface. Three address inputs set the bus address for the temperature sensor to provide up to eight devices on one bus. The internal thermal sensor continuously monitors the temperature and updates the temperature data eight times per second. The master can read the temperature data at any time. Since the thermal sensor is located on the memory module, temperature data recorded accurately represents the temperature of the components on the module. Consequently, the MAX6604 provides a much more accurate measurement of module temperature than techniques involving temperature sensors on the motherboard. In addition, the device responds more quickly to temperature changes on the module than a motherboard sensor. The MAX6604 also features an interrupt-output indicator for temperature-threshold monitoring. The threshold levels are programmable through the digital interface. The MAX6604 operates from -20C to +125C, and is available in JEDEC-standard 8-pin TSSOP and TDFN (MO-229-WCED-2) packages.
Features
JEDEC Compliant 1C Temperature-Monitoring Accuracy Overtemperature Interrupt with Programmable Threshold +2.7V to +3.6V Operating Voltage Range SMBus/I 2C-Compatible Interface 300A Typical Operating Current 3A Typical Shutdown Current -20C to +125C Operating Temperature Range 8-Pin TSSOP and TDFN (MO-229-WCED-2) Packages
MAX6604
Ordering Information
PART MAX6604ATA TEMP RANGE -20C to +125C PIN-PACKAGE PKG CODE
8 TDFN-EP** T823-1 (MO229-WCED-2) H8-1
MAX6604AHA -20C to +125C 8 TSSOP
**EP = Exposed paddle.
Applications
Memory Modules Desktop Computers Notebook Computers Workstations Networking Equipment
TOP VIEW
Pin Configurations
VCC EVENT SCL
SDA 5
8
7
6
MAX6604
1 A0
2 A1
3 A2
4 GND
Typical Application Circuit appears at end of data sheet.
TDFN-EP**
A0
1
8
VCC
SMBus is a trademark of Intel Corporation.
A1
2
7
EVENT
MAX6604
A2 3 6 SCL
GND
4
5
SDA
TSSOP
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Precision Temperature Monitor for DDR Memory Modules MAX6604
ABSOLUTE MAXIMUM RATINGS
All Input and Output Voltages ..................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) 8-Pin TDFN (derate 16.7mW/C above +70C) ......1333.3mW 8-Pin TSSOP (derate 8.1mW/C above +70C) ........646.7mW ESD Protection (all pins, Human Body Model) ....................2kV Junction Temperature ......................................................+150C Operating Temperature Range .........................-20C to +125C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +3.6V, TA = -20C to +125C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Note 1)
PARAMETER Operating Supply Voltage Range Temperature Resolution +3V VCC +3.6V, +75C TA +95C Temperature Accuracy Power-On Reset (POR) Threshold POR Threshold Hysteresis Undervoltage-Lockout Threshold Operating Current Standby Current Conversion Time Conversion Rate DIGITAL INTERFACE (Note 2) Logic-Input High Voltage (SCL, SDA) Logic-Input Low Voltage (SCL, SDA) Logic-Input Hysteresis (SCL, SDA) Leakage Current (EVENT, SCL, SDA, A2, A1, A0) Logic-Output Low Voltage (SDA, EVENT) Logic-Output Low Sink Current (SDA, EVENT) Input Capacitance (SCL, SDA) Serial-Clock Frequency ILEAK VOL IOL CIN fSCL 10 VIN = GND or VCC IPULL_UP = 350A VOL = 0.6V 6 5 100 -1 VIH VIL 500 +1 50 2.1 0.8 V V mV A mV mA pF kHz tCONV fCONV 8 During conversion +3V VCC +3.6V, +40C TA +125C +3V VCC +3.6V, -20C TA +125C VCC falling edge -1 -2 -3 2.0 90 2.4 0.3 3 0.5 6 125 SYMBOL VCC CONDITIONS MIN +2.7 0.125 11 +1 +2 +3 V mV V mA A ms Hz C TYP MAX +3.6 UNITS V C bits
2
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Precision Temperature Monitor for DDR Memory Modules
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.7V to +3.6V, TA = -20C to +125C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Note 1)
PARAMETER Bus Free Time Between STOP and START Condition Repeat START Condition Setup Time START Condition Hold Time STOP Condition Setup Time Clock Low Period Clock High Period Data Hold Time Data Setup Time Receive SCL/SDA Rise Time Receive SCL/SDA Fall Time Pulse Width of Spike Suppressed SYMBOL tBUF tSU:STA tHD:STA tSU:STO tLOW tHIGH tHD:DAT tSU:DAT tR tF tSP 0 90% of SMBDATA to 10% of SMBCLK 90% to 90% 10% of SMBDATA to 90% of SMBCLK 90% of SMBCLK to 10% of SMBDATA 10% to 10% 90% to 90% CONDITIONS MIN 4.7 4.7 4 4 4.7 4 300 250 1000 300 50 TYP MAX UNITS s s s s s s ns ns ns ns ns
MAX6604
Note 1: All parameters are tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design.
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3
Precision Temperature Monitor for DDR Memory Modules MAX6604
Typical Operating Characteristics
(Typical values are at VCC = +3.3V, TA = +25C.)
SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE
MAX6604 toc01
SUPPLY CURRENT vs. TEMPERATURE
MAX6604 toc02
TEMPERATURE ERROR vs. TEMPERATURE
MAX6604 toc03
6 SHUTDOWN SUPPLY CURRENT (A) 5 4 3 VCC = 3.0V 2 1 0 -50 0 50 TEMPERATURE (C) 100 VCC = 2.7V VCC = 3.6V VCC = 3.3V
360 VCC = 3.3V 340 SUPPLY CURRENT (A) VCC = 3.6V
3 2 TEMPERATURE ERROR (C) 1 0 -1 VCC = 3.6V -2 -3 VCC = 3.3V
VCC = 3.0V
320
300
280 VCC = 2.7V 260 150 -50 0
VCC = 3.0V
50 TEMPERATURE (C)
100
150
-50
0
50 TEMPERATURE (C)
100
150
TEMPERATURE ERROR vs. POWER SUPPLY NOISE FREQUENCY
SQUARE WAVE APPLIED TO VCC WITH NO BYPASS CAPACITOR 200mVPP 1.5
MAX6604 toc04
2.5
TEMPERATURE ERROR (C)
2.0
1.0
20mVPP
0.5
0 0.1 10 1,000 100,000 POWER SUPPLY NOISE FREQUENCY (kHz)
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME A0 A1 A2 GND SDA SCL EVENT VCC FUNCTION Address Input. Must connect to GND or VCC to set value. Address Input. Must connect to GND or VCC to set value. Address Input. Must connect to GND or VCC to set value. Ground Serial-Data Input/Output. Open drain. Connect to a pullup resistor. Serial-Clock Input. Connect to a pullup resistor. Event Output. Open drain. Connect to a pullup resistor. Supply Voltage. Connect a 0.1F capacitor to GND as close as possible to the device.
4
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Precision Temperature Monitor for DDR Memory Modules
Detailed Description
The MAX6604 high-precision temperature sensor continuously monitors temperature and updates the temperature data eight times per second. The device functions as a slave on the SMBus/I2C-compatible interface. The master can read the temperature data at any time through the digital interface. The MAX6604 also features an open-drain, event-output indicator for temperature-threshold monitoring. From a software perspective, the MAX6604 appears as a set of 16-bit registers that contain temperature data, alarm threshold values, and control bits. A standard SMBus/I2C-compatible, 2-wire serial interface reads temperature data and writes control bits and alarm threshold data. Each device responds to its own SMBus/I2C slave address, which is selected using A0, A1, and A2. See the Device Addressing section for details. The MAX6604 employs standard I2C/SMBus protocols using 16-bit registers: write word and read word. Write a word of data (16 bits) by first sending MAX6604's I2C address (0011-A2-A1-A0-0), then sending the 8-bit command byte, followed by the first 8-bit data byte. Note that the slave issues an acknowledge after each byte is written. After the first 8-bit data byte is written, the MAX6604 also returns an acknowledge. However, the master does not generate a stop condition after the first byte has been written. The master continues to write the second byte of data with the slave acknowledging. After the second byte has been written, the master then generates a stop condition. See Figure 2. To read a word of data, the master generates a new start condition and sends MAX6604's I2C address with the R/W bit high (1010-A2-A1-A0-1), then sends the 8bit command byte. Again, the MAX6604 issues an ACK for each byte received. The master again sends the device address, following an acknowledge. Next, the master reads the contents of the selected register, beginning with the most significant bit, and acknowledges if the most significant data byte is successfully received. Finally, the master reads the least significant data byte and issues a NACK, followed by a stop condition to terminate the read cycle.
MAX6604
Serial Interface
SMBus/I2C The MAX6604 is readable and programmable through the SMBus/I2C-compatible interface. The device functions as a slave on the interface. Figure 1 shows the general timing diagram of the clock (SCL) and the data (SDA) signals for the SMBus/I2C-compatible interface. The SDA and SCL bus lines are at logic-high when the bus is not in use. Pullup resistors from the bus lines to the supply are required when push-pull circuitry is not driving the lines. The data on the SDA line can change only when the SCL line is low. Start and stop conditions occur when SDA changes state while the SCL line is high (Figure 1). Data on SDA must be stable for the duration of the setup time (tSU:DAT) before SCL goes high. Data on SDA is sampled when SCL toggles high with data on SDA is stable for the duration of the hold time (tHD:DAT). Note that a segment of data is transmitted in an 8-bit byte. A total of nine clock cycles are required to transfer a byte to the MAX6604. Since the MAX6604 employs 16-bit registers, data is transmitted or received in two 8-bit bytes (16 bits). The device acknowledges the successful receipt for each byte by pulling the SDA line low (issuing an ACK) during the ninth clock cycle of each byte transfer.
SDA tBUF tSU:DAT tHD:DAT tSU:STA tHD:STA tSU:STO
SCL
tLOW tHD:STA tR tF
START CONDITION
REPEATED START CONDITION
STOP CONDITION
Figure 1. SDA and SCL Timing Diagram _______________________________________________________________________________________ 5
Precision Temperature Monitor for DDR Memory Modules MAX6604
Write Word Format S ADDRESS 7 bits Slave Address: equivalent to chip-select line of a 3-wire interface Read Word Format S ADDRESS 7 bits Slave Address: equivalent to chip-select line of a 3-wire interface S = Start condition P = Stop condition R/W ACK COMMAND 8 bits Command Byte: selects to which register you are writing Slave Address: repeated due to change in dataflow direction ACK S ADDRESS R ACK DATA 8 bits (MSB) ACK DATA 8 bits (LSB) NA P R/W ACK COMMAND 8 bits Command Byte: selects to which register you are writing ACK DATA 8 bits (MSB) ACK DATA 8 bits (LSB) ACK P
Data Byte: data goes into the register set by the co mma nd byte
Data Bytes: reads from the register set by the command byte
R/W = Read/Write Shaded = Slave transmission
ACK = Acknowledge NA = Not acknowledged
Figure 2. SMBus/I2C Protocols
Device Addressing The temperature sensor is accessed through the SMBus/I2C bus using an 8-bit address. The temperature sensor address begins with 0011 and is followed by the logic states of the A2, A1, and A0 inputs. These inputs must be hardwired to either GND or VCC. The three address inputs set the bus address for the temperature sensor to allow up to eight devices on one bus. The 8th bit (R/W) dictates a read or write operation. Set the R/W bit low for a write operation and set the R/W bit high for a read operation. See Table 1 for a summary of the device address.
Table 1. MAX6604 Sensor Address
FUNCTION Temperature sensor 0 0 1 ADDRESS 1 A2 A1 A0 R/W
Table 2. MAX6604 Registers
ADDRESS 00h 01h 02h 03h 04h 05h 06h 07h 08h-0Eh POR STATE 0017h 0000h 0000h 0000h 0000h 0000h 004Dh 3E00h 0000h DESCRIPTION Capability register Configuration register Alarm-temperature upper-boundary trip register Alarm-temperature lower-boundary trip register Critical-temperature trip register Temperature register Manufacturer's ID register Device ID/revision register Vendor-defined registers (not used)
Temperature Sensor
The thermal sensor continuously monitors the temperature and records the temperature data at least eight times per second. Temperature data is latched internally by the MAX6604 and can be read by software from the bus host at any time. Access to the temperature sensor is through the slave ID of 0011-A2-A1-A0. The I2C address-selection inputs (A2, A1, A0) allow up to eight such devices to coexist on the same bus. Consequently, eight memory modules can be supported, given each module has one such slave device address slot. Upon application of power, the MAX6604's configuration registers are set to their default values. Table 2 lists the various temperature registers and their default states. Note that all registers are 16 bits in length.
6
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Precision Temperature Monitor for DDR Memory Modules
EVENT-Output Functionality
The EVENT output indicates conditions such as the temperature crossing a predefined boundary. It operates in one of the three modes: interrupt mode, comparator mode, and critical-temperature-only mode. Figure 3 shows an example of the measured temperature vs. time, with the corresponding behavior of the EVENT output in each of these modes. See the EVENT Operation Modes section for descriptions of the two modes. The EVENT modes are selected using the configuration register. Event-output polarity can be set to active high or active low through the configuration register (bit 1). The EVENT output can also be disabled so that EVENT is always high impedance (bit 3). Upon device power-up, the default condition for the EVENT output is high impedance. Writing a 1 to bit 3 of the configuration register enables the EVENT output. triggers whenever entering or exiting (crossing above or below) the alarm window (Figure 3). Critical Trip The critical temperature setting is programmed in the critical temperature register. When the temperature reaches the critical temperature value in this register (and EVENT is enabled), the EVENT output asserts and cannot be deasserted until the temperature drops below the critical temperature threshold.
MAX6604
EVENT Operation Modes
Comparator Mode In comparator mode, the EVENT output behaves like a window-comparator output that asserts when the temperature is outside the window. Reads/writes on the MAX6604's registers do not affect the EVENT output in comparator mode. The EVENT signal remains asserted until the temperature goes inside the alarm window or the window thresholds are reprogrammed so that the current temperature is within the alarm window. Interrupt Mode In interrupt mode, EVENT asserts whenever the temperature crosses an alarm window threshold. After such an event occurs, writing a 1 to the clear event bit in the configuration register deasserts the EVENT output until the next trigger condition occurs. The trip threshold value in
EVENT Thresholds
Alarm Window Trip The MAX6604 provides a comparison window with an upper-temperature trip point and a lower-temperature trip point, programmed through the alarm-upperboundary register and the alarm-lower-boundary register, respectively. When enabled, the EVENT output
TEMP
CRITICAL
ALARM WINDOW
TIME S/W CLEARS EVENT EVENT# IN INTERRUPT
EVENT# IN COMPARATOR MODE
EVENT# IN CRITICAL-TEMPERATURE-ONLY MODE
Figure 3. EVENT Behavior in Interrupt, Comparator, and Critical-Temperature-Only Modes _______________________________________________________________________________________ 7
Precision Temperature Monitor for DDR Memory Modules
the critical temperature register is likely to be higher than that of the alarm-upper-boundary register. As a result, when the temperature is above the critical temperature, it is likely that it is above the alarm-upper-boundary as well. In interrupt mode, EVENT asserts when the temperature crosses the alarm upper boundary. If the EVENT output is cleared and the temperature continues to increase until it crosses the critical temperature threshold, EVENT asserts again. Because the temperature is greater than the critical temperature threshold, a clear event command does not clear the EVENT output. Once the temperature drops below the critical temperature, EVENT deasserts immediately. If the EVENT output is not cleared before the temperature goes above the critical temperature threshold, EVENT remains asserted. Attempting a clear event command has no effect until the temperature drops below the critical temperature, at which point EVENT deasserts immediately because of the earlier clear event command. If no clear event command is attempted, EVENT remains asserted after the temperature drops below the critical temperature. At this point, a clear event command deasserts EVENT.
MAX6604
Detailed Register Descriptions
Capability Register (Read Only) [Address = 00h, POR = 0017h]
This register indicates the capabilities of the thermal sensor, including accuracy, temperature range, and resolution. See Table 3 for register details.
Configuration Register (Read/Write) [Address = 01h, POR = 0000h]
This register controls the various features of EVENT functionality, and controls the bit for thermal-sensor shutdown mode. See Table 4 for register details. Hysteresis When enabled, hysteresis is applied to temperature variations around trigger points. For example, consider the behavior of the alarm window bit (bit 14 of the temperature register) when the hysteresis is set to 3C. As the temperature rises, bit 14 is set to 1 (temperature is above the alarm window) when the temperature register contains a value that is greater than the value in the alarm temperature upper boundary register. If the temperature decreases, bit 14 remains set until the measured temperature is less than or equal to the value in the alarm temperature upper boundary register minus 3C.
Table 3. Capability Register (Read Only)
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Wider range Bit 1 Higher precision Bit 0 Has alarm and critical trips
TRES1
BIT 0
DEFINITION (DESCRIPTIONS IN BOLD TYPE APPLY TO THE MAX6604) Basic capability 1: Has alarm and critical trips capability Accuracy 0 = Default accuracy 2C over the active and 3C monitor ranges 1 = High accuracy 1C over the active and 2C monitor ranges Wider range 0 = Values lower than 0C are clamped and represented as binary value 0 1 = Can read temperature below 0C and set sign bit accordingly Temperature resolution 00 = 0.5C LSB 01 = 0.25C LSB 10 = 0.125C LSB 11 = 0.0625C LSB 0: Reserved for future use (RFU). Must be zero.
1
2
4:3
15:5
8
_______________________________________________________________________________________
TRES0
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
Precision Temperature Monitor for DDR Memory Modules MAX6604
Table 4. Configuration Register (Read/Write)
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Hysteresis Bit 9 Bit 8 Shutdown mode Bit 7 Critical trip lock bit Bit 6 Alarm window lock bit Bit 5 Clear EVENT Bit 4 EVENT output status Bit 3 EVENT output control Bit 2 Critical EVENT only Bit 1 EVENT polarity Bit 0 EVENT mode
RFU
RFU
RFU
RFU
BIT
DEFINITION (DESCRIPTIONS IN BOLD TYPE ARE THE DEFAULT VALUES) EVENT mode 0 = Comparator output mode (default) 1 = Interrupt mode When either of the lock bits is set, this bit cannot be altered until unlocked. EVENT polarity 0 = Active low (default) 1 = Active high When either of the lock bits is set, this bit cannot be altered until unlocked. Critical EVENT only 0 = EVENT output on alarm or critical temperature mode (default) 1 = EVENT only if temperature is above the value in the critical temp register When the alarm window lock bit is set, this bit cannot be altered until unlocked. EVENT output control 0 = EVENT output disabled (default) [Disabled means EVENT remains in an inactive voltage level] 1 = EVENT output enabled When either of the lock bits is set, this bit cannot be altered until unlocked. EVENT output status (read only) 0 = EVENT output condition is not being asserted by this device 1 = EVENT output is being asserted by this device due to alarm window or critical trip condition The actual conditions causing an EVENT output can be determined from the temperature register. Interrupt mode can be cleared by writing to the clear EVENT bit. Writing to this bit has no effect; this bit is not affected by the polarity setting. Clear EVENT (write only) 0 = No effect 1 = Clears active event in interrupt mode. Writing to this register has no effect in comparator mode When read, this bit always returns to zero. Alarm window lock bit 0 = Alarm trips are not locked and can be altered (default) 1 = Alarm trip register settings cannot be altered This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by the internal power-on reset. Lock bits and other configuration register bits are updated during the same write; double writes are not necessary. Critical trip lock bit 0 = Critical trip is not locked and can be altered (default) 1 = Critical trip register settings cannot be altered This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by the internal power-on reset. Lock bits and other configuration register bits are updated during the same write; double writes are not necessary.
0
1
2
3
4
5
6
7
_______________________________________________________________________________________
RFU
9
Precision Temperature Monitor for DDR Memory Modules MAX6604
Table 4. Configuration Register (Read/Write) (continued)
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Hysteresis Bit 9 Bit 8 Shutdown mode Bit 7 Critical trip lock bit Bit 6 Alarm window lock bit Bit 5 Clear EVENT Bit 4 EVENT output status Bit 3 EVENT output control Bit 2 Critical EVENT only Bit 1 EVENT polarity Bit 0 EVENT mode Bit 0 0
RFU
RFU
RFU
RFU
BIT
DEFINITION (DESCRIPTIONS IN BOLD TYPE ARE THE DEFAULT VALUES) Shutdown mode 0 = Enable temperature monitoring (default) 1 = Shutdown temperature monitoring When shutdown occurs, the thermal-sensing device and analog-to-digital converter are disabled to save power; no EVENT output signals are generated. When either of the lock bits is set, this bit cannot be set until unlocked. However, it can be cleared at any time. Hysteresis enable 00 = Disable hysteresis 01 = Enable hysteresis at 1.5C 10 = Enable hysteresis at 3C 11 = Enable hysteresis at 6C 0: Reserved for future use (RFU). Must be zero.
8
10:9
15:11
Similarly, the below alarm window bit (bit 13 of the temperature register) is set to 0 (temperature is equal to or above the alarm window lower boundary trip temperature) when the value in the temperature register is equal to or greater than the value in the alarm-temperature lower-boundary register. As the temperature decreases, bit 13 is set to 1 when the value in the temperature register is equal to or less than the value in the alarmtemperature lower-boundary register minus 3C. Note that hysteresis is also applied to EVENT output functionality. When either of the lock bits is set, the hys-
RFU
teresis bits cannot be altered. Hysteresis is applied to both alarm window comparisons and critical temperature comparisons.
Alarm-Temperature Upper-Boundary Trip Register (Read/Write) [Address = 02h, POR = 0000h]
The data format for the upper-boundary trip threshold is in two's complement with one LSB = 0.25C. The alarmtemperature upper-boundary trip register has a -256.00C to +255.75C range. All unused bits are set to zero.
Table 5. Alarm-Temperature Upper-Boundary Trip Register (Read/Write)
Bit 15 Bit 14 Bit 13 Bit 12 Sign MSB Bit 11 128C Bit 10 64C Bit 9 32C Bit 8 16C Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 0.5C Bit 2 0.25C Bit 1
8C
4C
2C
1C
0
0
10
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0
0
Precision Temperature Monitor for DDR Memory Modules MAX6604
FUNCTION Sets Clears BELOW ALARM WINDOW BIT Temperature slope Falling Rising Threshold temperature TL - Hyst TL ABOVE ALARM WINDOW BIT Temperature slope Rising Falling Threshold temperature TH TH - Hyst
TH TH - HYST
TL TL - HYST
BELOW WINDOW BIT
ABOVE WINDOW BIT
Figure 4. Hysteresis Applied to Temperature Comparisons
Alarm-Temperature Lower-Boundary Trip Register (Read/Write) [Address = 03h, POR = 0000h]
The data format for the lower-boundary trip threshold is in two's complement with one LSB = 0.25C. The alarmtemperature lower-boundary trip register has a -256.00C to +255.75C range. All unused bits are set to zero.
Table 6. Alarm-Temperature Lower-Boundary Trip Register (Read/Write)
Bit 15 Bit 14 Bit 13 Bit 12 Sign MSB Bit 11 128C Bit 10 64C Bit 9 32C Bit 8 16C Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 0.5C Bit 2 0.25C Bit 1 Bit 0
8C
4C
2C
1C
0
0
0
0
______________________________________________________________________________________
0
11
Precision Temperature Monitor for DDR Memory Modules MAX6604
Critical Temperature Register (Read/Write) [Address = 04h, POR = 0000h]
The data format for the critical temperature value is in two's complement with one LSB = 0.25C. Critical temperature register has a -256.00C to +255.75C range. All unused bits are set to zero.
Table 7. Critical Temperature Register (Read/Write)
Bit 15 Bit 14 Bit 13 Bit 12 Sign MSB Bit 11 128C Bit 10 64C Bit 9 32C Bit 8 16C Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 0.5C Bit 2 0.25C Bit 1 Bit 0
8C
4C
2C
1C
0
0
0
Temperature Register (Read Only) [Address = 05h, POR = 0000h]
The data format is two's complement with one LSB = 0.125C. All unused bits are set to zero. The most significant bit has a resolution of 128C. The trip status bits represent the internal temperature trip detection, and
0
are not affected by the status of the EVENT or configuration bits (e.g., event output control, clear event, etc.). If neither the above alarm window (bit 14) nor the below alarm window (bit 13) are set (i.e., both are 0), the current temperature is within the alarm window.
Table 8. Temperature Register (Read Only)
Bit 15 Above critical trip Bit 14 Above alarm window Bit 13 Below alarm window Bit 12 Sign MSB Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0.125C
0.25C
128C
0.5C
64C
32C
16C
8C
4C
2C
1C
BIT 13
DEFINITION Below alarm window 0 = Temperature is equal to or above the alarm window lower boundary temperature 1 = Temperature is below the alarm window (temperature < alarm temperature lower boundary minus the hysteresis) Above alarm window 0 = Temperature is equal to or below the alarm window upper boundary temperature minus the hysteresis 1 = Temperature is above the alarm window (temperature > alarm temperature upper boundary) Above critical trip 0 = Temperature is below the critical temperature setting minus the hysteresis 1 = Temperature is equal to or above the critical temperature setting (temperature critical temperature)
14
15
12
______________________________________________________________________________________
0
0
Precision Temperature Monitor for DDR Memory Modules MAX6604
Table 9. Manufacturer's ID Register (Read Only) [Address = 06h, POR = 004Dh]
Bit 15 0 Bit 14 0 Bit 13 0 Bit 12 0 Bit 11 0 Bit 10 0 Bit 9 0 Bit 8 0 Bit 7 0 Bit 6 1 Bit 5 0 Bit 4 0 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 1
Table 10. Device ID and Revision Register (Read Only) [Address = 07h, POR = 3E00h]
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Device ID (0011-1110) Device revision (0000-0000)
Typical Application Circuit
VCC
0.1F 1 A0 2 A1 3 A2 4 GND VCC 8 EVENT 7 10k 10k 10k
MAX6604
SCL 6 SDA 5
TO SMBus/I2C MASTER
Chip Information
PROCESS: BiCMOS
______________________________________________________________________________________
13
Precision Temperature Monitor for DDR Memory Modules MAX6604
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 8L TDFN, EXPOSED PAD, 2x3x0.80mm
21-0174
A
1 2
14
______________________________________________________________________________________
8L, TDFN.EPS
Precision Temperature Monitor for DDR Memory Modules
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX6604
DIMENSIONS SYMBOL A E D A1 L k A2 N ND e b 0.18 MIN. 0.70 2.95 1.95 0.00 0.30 NOM. 0.75 3.00 2.00 0.02 0.40 0.20 MIN. 0.20 REF. 8 4 0.50 BSC 0.25 MAX. 0.80 3.05 2.05 0.05 0.50 EXPOSED PAD PACKAGE PKG. CODE T823-1 E2 MIN. 1.60 NOM. 1.75 MAX. 1.90 MIN. 1.50 D2 NOM. 1.63 MAX. 1.75
0.30
PACKAGE OUTLINE 8L TDFN, EXPOSED PAD, 2x3x0.80mm
21-0174
A
2 2
______________________________________________________________________________________
15
Precision Temperature Monitor for DDR Memory Modules MAX6604
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
8L TSSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products
Springer
is a registered trademark of Maxim Integrated Products, Inc.

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